The present invention relates to a two dimensional shift-array for use in image compression VLSI.
In any high speed silicon implementation of any function where there is a continuous throughput of data such as in an image compression VLSI, it is important to keep all stages busy all of the time to maximize throughput. Often this involves the use of a "tandem" approach. Certain functions may need to be "duplicated" so that one of the two functional blocks is working on data from time and the other block is done and is passing on data from time (t-1).
A desirable image compression technique is described in the above-identified cross-referenced application entitled APPARATUS AND METHOD FOR COMPRESSING STILL IMAGES WITHOUT MULTIPLICATION, the details of which are hereby incorporated by reference. In that application, such a "duplication" appears necessary at one particular stage of the process.
It would be desirable to provide an improved shift array which could be utilized in an image compression apparatus such as described in the above co-pending patent application.